1. Technical Field
The present teaching relates to method and system for event synchronization. More specifically, the present teaching relates to method and system for event synchronization without designating master and slave devices and the systems incorporating the same.
2. Discussion of Technical Background
Many electronic systems require multiple power supplies to achieve the functionality they are designed for. Frequently, such power supplies have to be turned on and off in a specific order with specific time relationships (sequencing) in order to prevent damage to the powered devices. Sometimes the sequencing even involves multiple electronic circuits located in physically different locations or sub-assemblies. Given that, it is commonly understood that to perform sequencing amongst multiple devices, a means of electrical communication between electronic circuits to be sequenced has to occur in a proper manner. Therefore, it is desirable to synchronize multiple events among multiple devices in a cost effective way.
Traditionally, approaches developed for a sequencing system include a master device and at least one slave device. The master and slave device(s) are responsive to a single sequencing signal. The master device controls the timing among sequenced events. The duration of the sequenced event is controlled by master or slave devices responsive to an event complete signal. A counter residing in each device keeps track of each sequence position. Often, enable or disable signals may be generated for the sequenced event at any sequence position. Multiple sequenced events may occur at any sequence position. It is the master device that controls the termination of the sequencing operation and typically it is done by controlling when the maximum number of events allowed by the sequence position counter has been realized.
Although such prior methods also use a single node, they require master device and slave device designations. Such designations of master and slave properties imply that additional circuits must exist, which implement the master and slave functions. The additional circuits add complexity and consume physical resources. In addition, the prior methods also require a rigid number of potential sequencing positions, i.e., the sequencing operation must go through a fixed number of positions even when some of the positions do not correspond to any scheduled events. For example, in a system using the prior art solutions, if there are N available sequence positions, the single wire communication will toggle into N states during the turn-on phase and N states during the turn-off phase, regardless of whether or not all N states are required. That is, if the last few positions do not really have any event scheduled, rather than completing the sequencing operation when there are no more events, the prior solutions must cycle through all positions before ending the operation. This introduces another waste of resources and leads to a latency between the last sequenced event and “steady-state” operation. Therefore, a more cost effective and self-organizing sequencing system is needed.